The present disclosure relates to microelectronic chip testing and diagnostics, and more specifically, to bitwise rotating scan section for microelectronic chip testing and diagnostics.
Today's chips are complex and typically composed of multiple sections, which are sometimes called cores. Different conventional methods exist for scanning conventional chips. One method, dedicated pin mode, uses dedicated pins for each section on a test bus. Drawbacks to dedicated pin scanning include inefficiencies caused by scan chain imbalances. Not all microelectronic sections are identical, and they can vary greatly in the number of scannable latches. For example, when using a dedicated scan bus, the scan chains may not be balanced. If 31 of the 32 channels are 100 latches long in each of the scan channels, but the 32nd channel is 1000 latches long, the chip will be scanned for 1000 cycles, there's no benefit gained from the shorter channels. Similarly, tester memory is gated by the longest channel. Manufacturing test time and tester memory is dictated by the longest scan channel. While there are drawbacks to this method when the scan chains are unbalanced there is an advantage from a diagnostics perspective. The dedicated pin can be monitored for pass/fail on the section. Fail data collection can also be easily adjusted as needed for the sections.
Another conventional method called multiple scan sections (MSS) may scan each section one at time by concatenating the sections on a single scan out pin. When a section is scanned it has full access to the scan bus. The scannable latches in the section need to be generally evenly distributed across the scan pins. Staying with the 32 wide scan bus, let's say we have a section with 3200 scannable latches and another with 32000 scannable latches. Using MSS, the section with 3200 latches would need only 100 scan clock cycles and the section with 32000 latches would need 1000 scan clock cycles. Methods using single channel MSS are limited by the amount of fail data that can be collected. When measuring one section at a time in a concatenated scan bus, the sections scanned first can fill up the fail data memory limiting data available from the scanning of subsequent sections.
When using MSS, each section is scanned in its entirety. Instead of scanning each section in its entirety, it may be advantageous to scan n number of bits from each section (for example, by dividing each scan chain into subsets, each having a predetermined number of latches), thereby sampling each latch set before scanning the whole scan chain or section. It may also be beneficial to provide methods and systems configured to perform rotational scanning using interleaving at either of the scan in or scan out busses.